A Low Power ROIC with Extended Counting ADC Based on Circuit Noise Analysis for Sensor Arrays in IoT System

As the Internet of Things (IoT) is rapidly integrated into our daily life, demand for high performance readout circuit (ROIC) design sensor arrays boosting. This paper presents a low power, noise ROIC with 14-bit column-parallel extended counting (EC) ADCs targeting IoT applications. The proposed EC-ADC adopts pseudodifferential architecture to cancel even-order nonlinearity. analog front-end G m stage, which employs current-reuse topology boost transconductance and reduce without increasing current consumption. upper 9-bit conversion implemented during integration, residual voltage converted by 5-bit single-slope (SS) ADC, where comparator reused. A ping-pong integrator reset time improve linearity, eliminating power-hungry CTIA structure. designed in 0.18 μm 1P5M CMOS process id="M2"> 640 × 480 array. Power consumption 33 mW, each column ADC consumes 40.1 μW. Simulation results show an input-referred 0.89 LSB (1.74 μVrms), integral nonlinearity +0.92/-0.70 LSB, ENOB 12.87 bits, FoM 131.1 fJ/step.